Small footprint and configurable Inter-Chip communication cores
Small footprint and configurable SATA core
Small footprint and configurable embedded FPGA logic analyzer
Small footprint and configurable DRAM core
Small footprint and configurable video cores
Small footprint and configurable PCIe core
Small footprint and configurable SDCard core
Small footprint and configurable Ethernet core
Build your hardware, easily!
Ariane is a 6-stage RISC-V CPU capable of booting Linux
Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
A template project for beginning new Chisel work
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more