From 01154a84d909ceb3efc8db88a939834ea2c895e1 Mon Sep 17 00:00:00 2001 From: Hao Xiang Date: Tue, 17 Jan 2023 16:25:21 +0800 Subject: [PATCH] src: fix ring pair reset failure in migration process Signed-off-by: Hao Xiang --- 1003-bugfix-ring-pair-reset-failure.patch | 289 ++++++++++++++++++++++ kmod-intel-QAT20.spec | 6 +- 2 files changed, 294 insertions(+), 1 deletion(-) create mode 100644 1003-bugfix-ring-pair-reset-failure.patch diff --git a/1003-bugfix-ring-pair-reset-failure.patch b/1003-bugfix-ring-pair-reset-failure.patch new file mode 100644 index 0000000..1f5efd2 --- /dev/null +++ b/1003-bugfix-ring-pair-reset-failure.patch @@ -0,0 +1,289 @@ +From dac1088440fb5c48827b3f640ad28990895694ec Mon Sep 17 00:00:00 2001 +From: Hao Xiang +Date: Tue, 17 Jan 2023 15:39:51 +0800 +Subject: [PATCH] adf_adi: fix ring pair reset failure after living migration + +Reset ring pair failure(timeout) occurs while executing functional +test in migration process. + +Support to handle pending resetctl. + +Signed-off-by: Hao Xiang +--- + .../qat/drivers/crypto/qat/qat_common/adf_adi.h | 18 ++- + .../crypto/qat/qat_common/adf_gen4_adi_hal.c | 133 ++++++++++++++++----- + .../drivers/crypto/qat/qat_common/adf_vdcm_adi.c | 9 +- + 3 files changed, 125 insertions(+), 35 deletions(-) + +diff --git a/quickassist/qat/drivers/crypto/qat/qat_common/adf_adi.h b/quickassist/qat/drivers/crypto/qat/qat_common/adf_adi.h +index d128402..2630d96 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_common/adf_adi.h ++++ b/quickassist/qat/drivers/crypto/qat/qat_common/adf_adi.h +@@ -41,6 +41,7 @@ struct adf_adi_ep { + int ims_group; + void *hw_priv; + bool reset_complete; ++ u32 pending_resetctl; + }; + + struct adf_adi_info { +@@ -73,9 +74,20 @@ struct adf_adi_ops { + u64 pos, void *buf, unsigned int len); + int (*vreg_read)(struct adf_adi_ep *self, + u64 pos, void *buf, unsigned int len); +- int (*state_size)(struct adf_adi_ep *self); +- int (*state_save)(struct adf_adi_ep *self, u8 *state, u32 size); +- int (*state_restore)(struct adf_adi_ep *self, u8 *state, u32 size); ++ int (*state_save)(struct adf_adi_ep *self, ++ void *(*state_encap)(void *mgr, const char *id, ++ int (*save)(void *sub_mgr, ++ u8 *buf, u32 size, ++ void *opa), ++ void *opa), ++ void *mgr); ++ int (*state_restore)(struct adf_adi_ep *self, ++ void *(*state_decap)(void *mgr, const char *id, ++ int (*res)(void *sub_mgr, ++ u8 *buf, u32 size, ++ void *opa), ++ void *opa), ++ void *mgr); + int (*state_resume)(struct adf_adi_ep *self); + } __packed; + +diff --git a/quickassist/qat/drivers/crypto/qat/qat_common/adf_gen4_adi_hal.c b/quickassist/qat/drivers/crypto/qat/qat_common/adf_gen4_adi_hal.c +index 00ef398..2c635b2 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_common/adf_gen4_adi_hal.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_common/adf_gen4_adi_hal.c +@@ -12,6 +12,7 @@ + #include "adf_transport_access_macros_gen4.h" + #include "adf_adi.h" + #include "adf_vdcm.h" ++#include "adf_vdcm_mstate.h" + + #define ADI_RESET_TIMEOUT_MS 5000 + #define ADI_RESET_POLLING_INTERVAL 20 +@@ -509,6 +510,7 @@ static int gen4_adi_mmio_rw32(struct adf_adi_ep *adi, u64 pos, + if (ADF_GET_RPRESETCTL_VALUE(*(u32 *)buf) == + RING_LEVEL_RESET) + adi->reset_complete = false; ++ adi->pending_resetctl = *(u32 *)buf; + } else { + if (ADF_GET_RPRESETCTL_VALUE(*(u32 *)buf) == + RING_LEVEL_ABORT) +@@ -525,8 +527,7 @@ static int gen4_adi_mmio_rw32(struct adf_adi_ep *adi, u64 pos, + */ + if (is_write) { + if (ADF_CSR_RD(base_addr, offset) & +- ADF_WQM_CSR_RPRESETSTS_MASK && +- *(u32 *)buf == ADF_WQM_CSR_RPRESETSTS_MASK) ++ ADF_WQM_CSR_RPRESETSTS_MASK) + adi->reset_complete = true; + } + break; +@@ -577,51 +578,127 @@ static int hal_vreg_read(struct adf_adi_ep *adi, + return gen4_adi_mmio_rw32(adi, pos, buf, len, false); + } + +-static int hal_rp_state_size(struct adf_adi_ep *adi) +-{ +- return sizeof(adi->shadow_arb) + sizeof(struct bank_state); +-} +- +-static int hal_rp_state_save(struct adf_adi_ep *adi, +- u8 *state, +- u32 size) ++static int hal_rp_bstate_save(void *subs, ++ u8 *state, ++ u32 size, ++ void *opa) + { ++ struct adf_adi_ep *adi = (struct adf_adi_ep *)opa; + struct adf_accel_dev *accel_dev; + struct adf_hw_device_data *hw_data; +- struct bank_state *bstate; + int ret; + +- if (size < hal_rp_state_size(adi)) +- return -EINVAL; +- + accel_dev = adi->parent; + hw_data = accel_dev->hw_device; ++ if (size < sizeof(struct bank_state)) { ++ dev_err(&GET_DEV(accel_dev), ++ "%s: No enough space for adi%d bank state\n", ++ __func__, adi->bank_idx); ++ return -EINVAL; ++ } + +- memcpy(state, &adi->shadow_arb, sizeof(adi->shadow_arb)); +- bstate = (struct bank_state *)(state + sizeof(adi->shadow_arb)); +- ret = hw_data->bank_state_save(accel_dev, adi->bank_idx, bstate); ++ ret = hw_data->bank_state_save(accel_dev, adi->bank_idx, ++ (struct bank_state *)state); + if (ret < 0) + return ret; +- return hal_rp_state_size(adi); ++ ++ return sizeof(struct bank_state); ++} ++ ++static int ++hal_rp_state_save(struct adf_adi_ep *adi, ++ void *(*state_encap)(void *mgr, const char *id, ++ int (*save)(void *sub_sects_mgr, ++ u8 *state, u32 size, ++ void *opa), ++ void *opa), ++ void *mgr) ++{ ++ u64 pending_resetctl; ++ struct adf_vqat_mstate_vreginfo info; ++ void *subs; ++ ++ info.addr = &adi->shadow_arb; ++ info.size = sizeof(adi->shadow_arb); ++ subs = (*state_encap)(mgr, "arb_en", NULL, &info); ++ if (!subs) ++ return -EINVAL; ++ if (adi->reset_complete) { ++ pending_resetctl = 0; ++ } else { ++ pending_resetctl = 1ULL << 63 | adi->pending_resetctl; ++ dev_info(&GET_DEV(adi->parent), ++ "%s: adi%d pending_resettl=0x%llx\n", ++ __func__, adi->bank_idx, pending_resetctl); ++ } ++ info.addr = &pending_resetctl; ++ info.size = sizeof(pending_resetctl); ++ subs = (*state_encap)(mgr, "p_rectl", NULL, &info); ++ if (!subs) ++ return -EINVAL; ++ subs = (*state_encap)(mgr, "m_regs", hal_rp_bstate_save, adi); ++ if (!subs) ++ return -EINVAL; ++ ++ return 0; + } + +-static int hal_rp_state_restore(struct adf_adi_ep *adi, ++static int hal_rp_bstate_restore(void *subs, + u8 *state, +- u32 size) ++ u32 size, ++ void *opa) + { ++ struct adf_adi_ep *adi = (struct adf_adi_ep *)opa; + struct adf_accel_dev *accel_dev; + struct adf_hw_device_data *hw_data; +- struct bank_state *bstate; +- +- if (size < hal_rp_state_size(adi)) +- return -EINVAL; + + accel_dev = adi->parent; + hw_data = accel_dev->hw_device; + +- memcpy(&adi->shadow_arb, state, sizeof(adi->shadow_arb)); +- bstate = (struct bank_state *)(state + sizeof(adi->shadow_arb)); +- return hw_data->bank_state_restore(accel_dev, adi->bank_idx, bstate); ++ return hw_data->bank_state_restore(accel_dev, adi->bank_idx, ++ (struct bank_state *)state); ++} ++ ++static int ++hal_rp_state_restore(struct adf_adi_ep *adi, ++ void *(*state_decap)(void *mgr, const char *id, ++ int (*res)(void *sub_sects_mgr, ++ u8 *state, u32 size, ++ void *opa), ++ void *opa), ++ void *mgr) ++{ ++ u64 pending_resetctl; ++ struct adf_vqat_mstate_vreginfo info; ++ void *subs; ++ ++ info.addr = &adi->shadow_arb; ++ info.size = sizeof(adi->shadow_arb); ++ subs = (*state_decap)(mgr, "arb_en", NULL, &info); ++ if (!subs) ++ return -EINVAL; ++ subs = (*state_decap)(mgr, "m_regs", hal_rp_bstate_restore, adi); ++ if (!subs) ++ return -EINVAL; ++ info.addr = &pending_resetctl; ++ info.size = sizeof(pending_resetctl); ++ subs = (*state_decap)(mgr, "p_rectl", NULL, &info); ++ if (!subs) ++ return -EINVAL; ++ if (pending_resetctl) { ++ u32 cmd = pending_resetctl & 0xffffffff; ++ ++ dev_info(&GET_DEV(adi->parent), ++ "%s: adi%d pending_resetctl=0x%llx, shadow_arb=%u\n", ++ __func__, adi->bank_idx, ++ pending_resetctl, adi->shadow_arb); ++ gen4_adi_mmio_rw32(adi, ADF_VQAT_RPRESETCTL, ++ &cmd, sizeof(cmd), true); ++ if (cmd == RING_LEVEL_RESET) ++ adi->shadow_arb = 0; ++ } ++ ++ return 0; + } + + static int hal_rp_state_resume(struct adf_adi_ep *adi) +@@ -640,6 +717,7 @@ static int hal_rp_state_resume(struct adf_adi_ep *adi) + adi->bank_idx, + adi->shadow_arb); + adi->shadow_arb = 0; ++ adi->reset_complete = true; + + return 0; + } +@@ -659,7 +737,6 @@ static struct adf_adi_ops gen4_adi_ops = { + .get_mmio_info = hal_rp_get_mmio, + .vreg_write = hal_vreg_write, + .vreg_read = hal_vreg_read, +- .state_size = hal_rp_state_size, + .state_save = hal_rp_state_save, + .state_restore = hal_rp_state_restore, + .state_resume = hal_rp_state_resume, +diff --git a/quickassist/qat/drivers/crypto/qat/qat_common/adf_vdcm_adi.c b/quickassist/qat/drivers/crypto/qat/qat_common/adf_vdcm_adi.c +index 1315682..5ea428c 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_common/adf_vdcm_adi.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_common/adf_vdcm_adi.c +@@ -1218,8 +1218,9 @@ static int adf_vdcm_mstate_etr_save(void *sub_sects_mgr, + * It is ok to save ADI state directly for now, this should be + * consistent with the operations of mmio_write + */ +- ret = (*adi->adi_ops->state_save)(adi, buf, size); +- if (ret <= 0) { ++ ret = (*adi->adi_ops->state_save)(adi, adf_vqat_mstate_sect_add, sub_sects_mgr); ++ ++ if (ret < 0) { + dev_err(mdev_dev(vqat->mdev), "failed to retrieve state\n"); + return -EIO; + } +@@ -1282,7 +1283,7 @@ static int adf_vdcm_mstate_ext_save(void *sub_sects_mgr, + return -EINVAL; + } + +- memcpy(buf, adf_vqat_caps_blk(vcap), size); ++ memcpy(buf, adf_vqat_caps_blk(vcap), cap_size); + + return cap_size; + } +@@ -1390,7 +1391,7 @@ static int adf_vdcm_state_etr_restore(void *sub_sects_mgr, + struct adf_vdcm_vqat *vqat = (struct adf_vdcm_vqat *)opaque; + struct adf_adi_ep *adi = (struct adf_adi_ep *)(vqat->hw_priv); + +- ret = (*adi->adi_ops->state_restore)(adi, buf, size); ++ ret = (*adi->adi_ops->state_restore)(adi, adf_vqat_mstate_sect_lookup, sub_sects_mgr); + if (ret < 0) { + dev_err(mdev_dev(vqat->mdev), + "%s: failed to restore state etr\n", +-- +1.8.3.1 + diff --git a/kmod-intel-QAT20.spec b/kmod-intel-QAT20.spec index 5ad5882..4933851 100644 --- a/kmod-intel-QAT20.spec +++ b/kmod-intel-QAT20.spec @@ -1,4 +1,4 @@ -%define anolis_release 9 +%define anolis_release 10 %define debug_package %{nil} %global kernel_version %(rpm -qa kernel-devel | sed -e 's/kernel-devel-//g') %define QAT_release 00004 @@ -13,6 +13,7 @@ Source: %{name}-%{version}-%{QAT_release}.tar.gz Patch1000: 1000-bugfix-support-5.10.patch Patch1001: 1001-bugfix-split-qat-vdcm-module.patch Patch1002: 1002-bugfix-crash-of-rmmod-vdcm.patch +Patch1003: 1003-bugfix-ring-pair-reset-failure.patch BuildRequires: gcc gcc-c++ make systemd-devel openssl-devel zlib-devel yasm BuildRequires: libudev-devel >= 1.47 @@ -85,6 +86,9 @@ ${ECHO} "%{name}-driver-%{version}-%{release} is installed!"; depmod -a %changelog +* Tue Jan 17 2023 Hao Xiang - 0.9.4-00004.10 +- Fix reset ring pair failure in migration process + * Fri Jan 13 2023 Xuchun Shang - 0.9.4-00004.9 - Modify package introduction -- Gitee