From f1e0fe5891f3ebefe6298f79715ea9d8dfc4f8f8 Mon Sep 17 00:00:00 2001 From: shaojinchun Date: Mon, 7 Mar 2022 18:29:48 +0800 Subject: [PATCH] =?UTF-8?q?fix:=20after=5Fmmu=5Fenable=E4=B9=8B=E5=90=8Edi?= =?UTF-8?q?sable=20ttbr0=E6=93=8D=E4=BD=9C=E5=9C=A8=E6=9F=90=E6=AC=A1debug?= =?UTF-8?q?=E6=97=B6=E8=A2=AB=E6=B3=A8=E9=87=8A=E6=8E=89=E4=BA=86=EF=BC=8C?= =?UTF-8?q?=E7=89=B9=E6=AD=A4=E4=BF=AE=E6=AD=A3=E5=9B=9E=E6=9D=A5?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- libcpu/aarch64/cortex-a/entry_point.S | 2 -- 1 file changed, 2 deletions(-) diff --git a/libcpu/aarch64/cortex-a/entry_point.S b/libcpu/aarch64/cortex-a/entry_point.S index c02aab89bc..b652739b4d 100644 --- a/libcpu/aarch64/cortex-a/entry_point.S +++ b/libcpu/aarch64/cortex-a/entry_point.S @@ -142,13 +142,11 @@ __start: ret after_mmu_enable: -#if 0 mrs x0, tcr_el1 /* disable ttbr0, only using kernel space */ orr x0, x0, #(1 << 7) msr tcr_el1, x0 msr ttbr0_el1, xzr dsb sy -#endif mov x0, #1 msr spsel, x0 -- Gitee